drivers: gpio: esp32: fix BIT overflow for pins >= 32#107124
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nashif merged 2 commits intozephyrproject-rtos:mainfrom Apr 15, 2026
Merged
drivers: gpio: esp32: fix BIT overflow for pins >= 32#107124nashif merged 2 commits intozephyrproject-rtos:mainfrom
nashif merged 2 commits intozephyrproject-rtos:mainfrom
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gpio_pin_is_valid() and gpio_pin_is_output_capable() use BIT() which expands to (1UL << n). On 32-bit Xtensa targets, unsigned long is 32 bits, so BIT(n) for n >= 32 is undefined behavior. This causes gpio1 pins (GPIO32+) to always fail validation with -EINVAL, breaking any peripheral connected to GPIO32-GPIO48 on ESP32-S3 (and similar ESP32 variants with gpio1). Fix by using BIT64() which correctly handles pin numbers >= 32 since SOC_GPIO_VALID_GPIO_MASK is already a 64-bit value. Signed-off-by: Matin Lotfaliei <matinlotfali@gmail.com>
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LucasTambor,
henrikbrixandersen,
marekmatej,
raffarost,
sylvioalves,
uLipe and
wmrsouza
Contributor
|
@matinlotfali please, would you also fix the Thanks! |
Same issue as the GPIO driver: esp32_pin_is_valid() and esp32_pin_is_output_capable() use BIT() which overflows on 32-bit Xtensa for pin numbers >= 32. Fix by using BIT64() to match the 64-bit SOC_GPIO_VALID_GPIO_MASK. Signed-off-by: Matin Lotfaliei <matinlotfali@gmail.com>
Contributor
Author
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@sylvioalves done |
sylvioalves
approved these changes
Apr 10, 2026
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wmrsouza
approved these changes
Apr 10, 2026
lucien-nxp
approved these changes
Apr 13, 2026
marekmatej
approved these changes
Apr 13, 2026
uLipe
approved these changes
Apr 13, 2026
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gpio_pin_is_valid()andgpio_pin_is_output_capable()useBIT()whichexpands to
(1UL << n). On 32-bit Xtensa targets,unsigned longis32 bits, so
BIT(n)forn >= 32is undefined behavior.This causes gpio1 pins (GPIO32+) to always fail validation with
-EINVAL, breaking any peripheral connected to GPIO32-GPIO48 onESP32-S3 (and similar ESP32 variants with gpio1).
Fix by using
BIT64()which correctly handles pin numbers >= 32since
SOC_GPIO_VALID_GPIO_MASKis already a 64-bit value.Note that correct devicetree addressing (
&gpio1 Ninstead of&gpio0 (N+32))does not work around this bug.
gpio_esp32_config()converts theport-relative pin to an absolute GPIO number (
io_pin = pin + 32for gpio1)before passing it to
gpio_pin_is_valid(io_pin), so theBIT()overflowstill occurs regardless of how the pin is addressed in the devicetree.
The bug may appear intermittent because the result of
1UL << NforN >= 32is undefined — at runtime on Xtensa hardware the shift amount wraps
(
N & 31, producing a non-zero value that passes the check), but when GCCconstant-folds the expression at compile time with optimizations enabled,
it can produce 0, causing the validation to fail.
Related: #65244