in this project, we have implemented MIPS multicycle projects using Vivado
using the architecture image that is attached
the following commands are supported:
R format: add, sub, addu, subu, and, or, xor, nor, slt, sltu, jr, jalr, multu, mfhi, mflo
I format: beq, bne, lw, sw, addi, addiu, slti, sltiu, andi, ori, xori, lui
J format: j, jal\
mohammadreza-babaeimosleh/MIPS-multicycle-CPU
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